Comparative study of C–V-based extraction methods of interface state density for a low-temperature polysilicon thin film

To extract comprehensive and accurate interface state density ( D _it ) distribution for a low-temperature polysilicon (LTPS) thin film, three well-established methods based on capacitance–voltage ( C – V ) measurements were compared: high–low frequency capacitance, conductance, and quasi-static (QS...

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Main Authors: Woohui Lee, Joohee Oh, Jae Hwan Chu, Sanggun Choi, Taewook Kang, Hyeyong Chu, Hyoungsub Kim
Format: Article
Language:English
Published: IOP Publishing 2021-01-01
Series:Materials Research Express
Subjects:
Online Access:https://doi.org/10.1088/2053-1591/ac1aa6
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author Woohui Lee
Joohee Oh
Jae Hwan Chu
Sanggun Choi
Taewook Kang
Hyeyong Chu
Hyoungsub Kim
author_facet Woohui Lee
Joohee Oh
Jae Hwan Chu
Sanggun Choi
Taewook Kang
Hyeyong Chu
Hyoungsub Kim
author_sort Woohui Lee
collection DOAJ
description To extract comprehensive and accurate interface state density ( D _it ) distribution for a low-temperature polysilicon (LTPS) thin film, three well-established methods based on capacitance–voltage ( C – V ) measurements were compared: high–low frequency capacitance, conductance, and quasi-static (QS) capacitance methods. Because of the strong frequency-dependent response of grain boundary traps within the LTPS, C – V measurements are necessary on p- as well as n-type LTPS films, as they provide D _it distribution across the entire LTPS band gap. The QS capacitance method, which uses an optimal high-frequency C – V curve with a minimal grain boundary trap response, provided the best and most comprehensive estimate of D _it distribution across the LTPS band gap, even at room temperature (25 °C). Although the narrow extraction ranges of D _it were extended toward the mid-gap region by increasing the measurement temperature in both high–low frequency capacitance and conductance methods, the responses of the grain boundary traps still overestimated the D _it values near the band edges.
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spelling doaj.art-83bd104425d441d8b0dac09399d861082023-08-09T15:51:48ZengIOP PublishingMaterials Research Express2053-15912021-01-018808590210.1088/2053-1591/ac1aa6Comparative study of C–V-based extraction methods of interface state density for a low-temperature polysilicon thin filmWoohui Lee0Joohee Oh1Jae Hwan Chu2Sanggun Choi3Taewook Kang4Hyeyong Chu5Hyoungsub Kim6https://orcid.org/0000-0003-3549-4250School of Advanced Materials Science & Engineering, Sungkyunkwan University , Suwon 16419, Republic of KoreaSchool of Advanced Materials Science & Engineering, Sungkyunkwan University , Suwon 16419, Republic of KoreaDisplay Research Center, Samsung Display Co., Ltd, Yongin-si 17113, Republic of KoreaDisplay Research Center, Samsung Display Co., Ltd, Yongin-si 17113, Republic of KoreaDisplay Research Center, Samsung Display Co., Ltd, Yongin-si 17113, Republic of KoreaDisplay Research Center, Samsung Display Co., Ltd, Yongin-si 17113, Republic of KoreaSchool of Advanced Materials Science & Engineering, Sungkyunkwan University , Suwon 16419, Republic of KoreaTo extract comprehensive and accurate interface state density ( D _it ) distribution for a low-temperature polysilicon (LTPS) thin film, three well-established methods based on capacitance–voltage ( C – V ) measurements were compared: high–low frequency capacitance, conductance, and quasi-static (QS) capacitance methods. Because of the strong frequency-dependent response of grain boundary traps within the LTPS, C – V measurements are necessary on p- as well as n-type LTPS films, as they provide D _it distribution across the entire LTPS band gap. The QS capacitance method, which uses an optimal high-frequency C – V curve with a minimal grain boundary trap response, provided the best and most comprehensive estimate of D _it distribution across the LTPS band gap, even at room temperature (25 °C). Although the narrow extraction ranges of D _it were extended toward the mid-gap region by increasing the measurement temperature in both high–low frequency capacitance and conductance methods, the responses of the grain boundary traps still overestimated the D _it values near the band edges.https://doi.org/10.1088/2053-1591/ac1aa6low-temperature polysiliconinterface state densitycapacitance-voltage
spellingShingle Woohui Lee
Joohee Oh
Jae Hwan Chu
Sanggun Choi
Taewook Kang
Hyeyong Chu
Hyoungsub Kim
Comparative study of C–V-based extraction methods of interface state density for a low-temperature polysilicon thin film
Materials Research Express
low-temperature polysilicon
interface state density
capacitance-voltage
title Comparative study of C–V-based extraction methods of interface state density for a low-temperature polysilicon thin film
title_full Comparative study of C–V-based extraction methods of interface state density for a low-temperature polysilicon thin film
title_fullStr Comparative study of C–V-based extraction methods of interface state density for a low-temperature polysilicon thin film
title_full_unstemmed Comparative study of C–V-based extraction methods of interface state density for a low-temperature polysilicon thin film
title_short Comparative study of C–V-based extraction methods of interface state density for a low-temperature polysilicon thin film
title_sort comparative study of c v based extraction methods of interface state density for a low temperature polysilicon thin film
topic low-temperature polysilicon
interface state density
capacitance-voltage
url https://doi.org/10.1088/2053-1591/ac1aa6
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