High‐Density Vertical Transistors with Pitch Size Down to 20 nm

High‐Density Vertical Transistors with Pitch Size Down to 20 nm

Abstract Vertical field effect transistors (VFETs) have attracted considerable interest for developing ultra‐scaled devices. In particular, individual VFET can be stacked on top of another and does not consume additional chip footprint beyond what is needed for a single device at the bottom, represe...

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Bibliographic Details
Main Authors: Zhaojing Xiao, Liting Liu, Yang Chen, Zheyi Lu, Xiaokun Yang, Zhenqi Gong, Wanying Li, Lingan Kong, Shuimei Ding, Zhiwei Li, Donglin Lu, Likuan Ma, Songlong Liu, Xiao Liu, Yuan Liu
Format: Article
Language:English
Published: Wiley 2023-10-01
Series:Advanced Science
Subjects:
graphene/Au hybrid drain
pitch size
vertical field effect transistor
Online Access:https://doi.org/10.1002/advs.202302760

Internet

https://doi.org/10.1002/advs.202302760

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