A New Technology for Reducing Dynamic Power Consumption in 8-Bit ALU Design
Clock gating is an effective way to decrease dissipated power in synchronous design. The most effective way to do this is by masking the clock that turns toward the unused part of design. In this paper, a comparative evaluation of power consumption in existing clock gating techniques in Arithmetic L...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Corporation of Research and Industrial Development
2022-12-01
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| Series: | Iraqi Journal of Industrial Research |
| Subjects: | |
| Online Access: | http://ijoir.gov.iq/ijoir/index.php/jou/article/view/279 |