Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS

Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS

This paper presents the first fully integrated radiation-tolerant All-Digital Phase-Locked Loop (PLL) and Clock and Data Recovery (CDR) circuit for wireline communication applications. Several radiation hardening techniques are proposed to achieve state-of-the-art immunity to Single-Event Effects (S...

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Bibliographic Details
Main Authors: Stefan Biereigel, Szymon Kulis, Paulo Moreira, Alexander Kölpin, Paul Leroux, Jeffrey Prinzie
Format: Article
Language:English
Published: MDPI AG 2021-11-01
Series:Electronics
Subjects:
All-Digital
PLL
CDR
Single-Event Effects
radiation hardening
Online Access:https://www.mdpi.com/2079-9292/10/22/2741

Internet

https://www.mdpi.com/2079-9292/10/22/2741

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