Drain Current Model for Double Gate Tunnel-FETs with InAs/Si Heterojunction and Source-Pocket Architecture

Drain Current Model for Double Gate Tunnel-FETs with InAs/Si Heterojunction and Source-Pocket Architecture

The practical use of tunnel field-effect transistors is retarded by the low on-state current. In this paper, the energy-band engineering of InAs/Si heterojunction and novel device structure of source-pocket concept are combined in a single tunnel field-effect transistor to extensively boost the devi...

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Bibliographic Details
Main Authors: Hongliang Lu, Bin Lu, Yuming Zhang, Yimen Zhang, Zhijun Lv
Format: Article
Language:English
Published: MDPI AG 2019-02-01
Series:Nanomaterials
Subjects:
TFET
BTBT
InAs/Si
heterojunction
staggered-bandgap
source-pocket
2D Poisson equations
parabolic approximation
Kane’s model
current model
Online Access:https://www.mdpi.com/2079-4991/9/2/181

Internet

https://www.mdpi.com/2079-4991/9/2/181

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