Design of universal convolutional layer IP core based on FPGA

Design of universal convolutional layer IP core based on FPGA

Aiming at the problems of insufficient computing speed and poor portability in the miniaturization and parallelization of convolutional neural network,this paper proposes a design of high-speed universal convolutional layer IP core using VHDL language based on the characteristics of convolutional ne...

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Bibliographic Details
Main Authors: Guochen AN, Hongtuo YUAN, Xiulu HAN, Xiaojun WANG, Yujia HOU
Format: Article
Language:zho
Published: Hebei University of Science and Technology 2021-06-01
Series:Journal of Hebei University of Science and Technology
Subjects:
integrated circuit technology; convolutional neural network; fpga; convolution layer; design parameterization
Online Access:http://xuebao.hebust.edu.cn/hbkjdx/ch/reader/create_pdf.aspx?file_no=b202103005&flag=1&journal_

Internet

http://xuebao.hebust.edu.cn/hbkjdx/ch/reader/create_pdf.aspx?file_no=b202103005&flag=1&journal_

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