Analysis of the Impact of Electrical and Timing Masking on Soft Error Rate Estimation in VLSI Circuits

Analysis of the Impact of Electrical and Timing Masking on Soft Error Rate Estimation in VLSI Circuits

Due to continuous CMOS technology downscaling, Integrated Circuits (ICs) have become more susceptible to radiation-induced hazards such as soft errors. Thus, to design radiation-hardened and reliable ICs, the Soft Error Rate (SER) estimation constitutes an essential procedure. An accurate SER evalua...

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Bibliographic Details
Main Authors: Pelopidas Tsoumanis, Georgios Ioannis Paliaroutis, Nestor Evmorfopoulos, George Stamoulis
Format: Article
Language:English
Published: MDPI AG 2022-01-01
Series:Technologies
Subjects:
electrical masking
interconnection delay
Single Event Multiple Transients
Soft Error Rate
STA
TCAD
Online Access:https://www.mdpi.com/2227-7080/10/1/23

Internet

https://www.mdpi.com/2227-7080/10/1/23

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