Cluster-based test vector re-ordering for reduced power dissipation in digital circuits
Optimizing testing power is a paramount concern in modern digital circuit design, particularly as the intricacy of circuits continues to rise. This issue becomes even more pronounced with the scaling down of feature sizes due to advancements in process technology. The increase in testing power dissi...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Taylor & Francis Group
2023-10-01
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| Series: | Automatika |
| Subjects: | |
| Online Access: | https://www.tandfonline.com/doi/10.1080/00051144.2023.2251230 |