Trends and challenges in design of embedded BCH error correction codes in multi-levels NAND flash memory devices
Recently, there has been a growing concern regarding the dependability of NAND flash cells, notably as the scale of their features reduces. To address this issue, implementing error correction codes (ECC) proves to be an effective solution. Among the various methods, BCH coding has gained significan...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2024-04-01
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| Series: | Memories - Materials, Devices, Circuits and Systems |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S277306462400001X |