Improving the High-Temperature Gate Bias Instabilities by a Low Thermal Budget Gate-First Process in p-GaN Gate HEMTs

Improving the High-Temperature Gate Bias Instabilities by a Low Thermal Budget Gate-First Process in p-GaN Gate HEMTs

In this study, we report a low ohmic contact resistance process on a 650 V E-mode p-GaN gate HEMT structure. An amorphous silicon (a-Si) assisted layer was inserted in between the ohmic contact and GaN. The fabricated device exhibits a lower contact resistance of about 0.6 Ω-mm after annealing at 55...

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Bibliographic Details
Main Authors: Catherine Langpoklakpam, An-Chen Liu, Neng-Jie You, Ming-Hsuan Kao, Wen-Hsien Huang, Chang-Hong Shen, Jerry Tzou, Hao-Chung Kuo, Jia-Min Shieh
Format: Article
Language:English
Published: MDPI AG 2023-02-01
Series:Micromachines
Subjects:
low thermal budget gate first process
ohmic contact
HTGB
gallium nitride
power device
Online Access:https://www.mdpi.com/2072-666X/14/3/576

Internet

https://www.mdpi.com/2072-666X/14/3/576

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