Fabrication of Low Cost and Low Temperature Poly-Silicon Nanowire Sensor Arrays for Monolithic Three-Dimensional Integrated Circuits Applications
In this paper, the poly-Si nanowire (NW) field-effect transistor (FET) sensor arrays were fabricated by adopting low-temperature annealing (600 °C/30 s) and feasible spacer image transfer (SIT) processes for future monolithic three-dimensional integrated circuits (3D-ICs) applications. Compared with...
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| Format: | Article |
| Language: | English |
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MDPI AG
2020-12-01
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| Series: | Nanomaterials |
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| Online Access: | https://www.mdpi.com/2079-4991/10/12/2488 |
| _version_ | 1797545028202004480 |
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| author | Siqi Tang Jiang Yan Jing Zhang Shuhua Wei Qingzhu Zhang Junjie Li Min Fang Shuang Zhang Enyi Xiong Yanrong Wang Jianglan Yang Zhaohao Zhang Qianhui Wei Huaxiang Yin Wenwu Wang Hailing Tu |
| author_facet | Siqi Tang Jiang Yan Jing Zhang Shuhua Wei Qingzhu Zhang Junjie Li Min Fang Shuang Zhang Enyi Xiong Yanrong Wang Jianglan Yang Zhaohao Zhang Qianhui Wei Huaxiang Yin Wenwu Wang Hailing Tu |
| author_sort | Siqi Tang |
| collection | DOAJ |
| description | In this paper, the poly-Si nanowire (NW) field-effect transistor (FET) sensor arrays were fabricated by adopting low-temperature annealing (600 °C/30 s) and feasible spacer image transfer (SIT) processes for future monolithic three-dimensional integrated circuits (3D-ICs) applications. Compared with other fabrication methods of poly-Si NW sensors, the SIT process exhibits the characteristics of highly uniform poly-Si NW arrays with well-controlled morphology (about 25 nm in width and 35 nm in length). Conventional metal silicide and implantation techniques were introduced to reduce the parasitic resistance of source and drain (SD) and improve the conductivity. Therefore, the obtained sensors exhibit >10<sup>6</sup> switching ratios and 965 mV/dec subthreshold swing (SS), which exhibits similar results compared with that of SOI Si NW sensors. However, the poly-Si NW FET sensors show the V<sub>th</sub> shift as high as about 178 ± 1 mV/pH, which is five times larger than that of the SOI Si NW sensors. The fabricated poly-Si NW sensors with 600 °C/30 s processing temperature and good device performance provide feasibility for future monolithic three-dimensional integrated circuit (3D-IC) applications. |
| first_indexed | 2024-03-10T14:09:53Z |
| format | Article |
| id | doaj.art-93cf14739c4a4376928392f25506db81 |
| institution | Directory Open Access Journal |
| issn | 2079-4991 |
| language | English |
| last_indexed | 2024-03-10T14:09:53Z |
| publishDate | 2020-12-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Nanomaterials |
| spelling | doaj.art-93cf14739c4a4376928392f25506db812023-11-21T00:20:49ZengMDPI AGNanomaterials2079-49912020-12-011012248810.3390/nano10122488Fabrication of Low Cost and Low Temperature Poly-Silicon Nanowire Sensor Arrays for Monolithic Three-Dimensional Integrated Circuits ApplicationsSiqi Tang0Jiang Yan1Jing Zhang2Shuhua Wei3Qingzhu Zhang4Junjie Li5Min Fang6Shuang Zhang7Enyi Xiong8Yanrong Wang9Jianglan Yang10Zhaohao Zhang11Qianhui Wei12Huaxiang Yin13Wenwu Wang14Hailing Tu15School of Information Science and Technology, North China University of Technology, Beijing 100144, ChinaSchool of Information Science and Technology, North China University of Technology, Beijing 100144, ChinaSchool of Information Science and Technology, North China University of Technology, Beijing 100144, ChinaSchool of Information Science and Technology, North China University of Technology, Beijing 100144, ChinaAdvanced Integrated Circuits R&D Center, Institute of Microelectronic of the Chinese Academy of Sciences, Beijing 100029, ChinaAdvanced Integrated Circuits R&D Center, Institute of Microelectronic of the Chinese Academy of Sciences, Beijing 100029, ChinaSchool of Information Science and Technology, North China University of Technology, Beijing 100144, ChinaSchool of Information Science and Technology, North China University of Technology, Beijing 100144, ChinaSchool of Information Science and Technology, North China University of Technology, Beijing 100144, ChinaSchool of Information Science and Technology, North China University of Technology, Beijing 100144, ChinaState Key Laboratory of Advanced Materials for Smart Sensing, General Research Institute for Nonferrous Metals, Beijing 101402, ChinaAdvanced Integrated Circuits R&D Center, Institute of Microelectronic of the Chinese Academy of Sciences, Beijing 100029, ChinaState Key Laboratory of Advanced Materials for Smart Sensing, General Research Institute for Nonferrous Metals, Beijing 101402, ChinaAdvanced Integrated Circuits R&D Center, Institute of Microelectronic of the Chinese Academy of Sciences, Beijing 100029, ChinaAdvanced Integrated Circuits R&D Center, Institute of Microelectronic of the Chinese Academy of Sciences, Beijing 100029, ChinaState Key Laboratory of Advanced Materials for Smart Sensing, General Research Institute for Nonferrous Metals, Beijing 101402, ChinaIn this paper, the poly-Si nanowire (NW) field-effect transistor (FET) sensor arrays were fabricated by adopting low-temperature annealing (600 °C/30 s) and feasible spacer image transfer (SIT) processes for future monolithic three-dimensional integrated circuits (3D-ICs) applications. Compared with other fabrication methods of poly-Si NW sensors, the SIT process exhibits the characteristics of highly uniform poly-Si NW arrays with well-controlled morphology (about 25 nm in width and 35 nm in length). Conventional metal silicide and implantation techniques were introduced to reduce the parasitic resistance of source and drain (SD) and improve the conductivity. Therefore, the obtained sensors exhibit >10<sup>6</sup> switching ratios and 965 mV/dec subthreshold swing (SS), which exhibits similar results compared with that of SOI Si NW sensors. However, the poly-Si NW FET sensors show the V<sub>th</sub> shift as high as about 178 ± 1 mV/pH, which is five times larger than that of the SOI Si NW sensors. The fabricated poly-Si NW sensors with 600 °C/30 s processing temperature and good device performance provide feasibility for future monolithic three-dimensional integrated circuit (3D-IC) applications.https://www.mdpi.com/2079-4991/10/12/2488silicon nanowire (Si NW)monolithic three-dimensional integrated circuits (M3D-ICs)spacer image transfer (SIT)sensitivity |
| spellingShingle | Siqi Tang Jiang Yan Jing Zhang Shuhua Wei Qingzhu Zhang Junjie Li Min Fang Shuang Zhang Enyi Xiong Yanrong Wang Jianglan Yang Zhaohao Zhang Qianhui Wei Huaxiang Yin Wenwu Wang Hailing Tu Fabrication of Low Cost and Low Temperature Poly-Silicon Nanowire Sensor Arrays for Monolithic Three-Dimensional Integrated Circuits Applications Nanomaterials silicon nanowire (Si NW) monolithic three-dimensional integrated circuits (M3D-ICs) spacer image transfer (SIT) sensitivity |
| title | Fabrication of Low Cost and Low Temperature Poly-Silicon Nanowire Sensor Arrays for Monolithic Three-Dimensional Integrated Circuits Applications |
| title_full | Fabrication of Low Cost and Low Temperature Poly-Silicon Nanowire Sensor Arrays for Monolithic Three-Dimensional Integrated Circuits Applications |
| title_fullStr | Fabrication of Low Cost and Low Temperature Poly-Silicon Nanowire Sensor Arrays for Monolithic Three-Dimensional Integrated Circuits Applications |
| title_full_unstemmed | Fabrication of Low Cost and Low Temperature Poly-Silicon Nanowire Sensor Arrays for Monolithic Three-Dimensional Integrated Circuits Applications |
| title_short | Fabrication of Low Cost and Low Temperature Poly-Silicon Nanowire Sensor Arrays for Monolithic Three-Dimensional Integrated Circuits Applications |
| title_sort | fabrication of low cost and low temperature poly silicon nanowire sensor arrays for monolithic three dimensional integrated circuits applications |
| topic | silicon nanowire (Si NW) monolithic three-dimensional integrated circuits (M3D-ICs) spacer image transfer (SIT) sensitivity |
| url | https://www.mdpi.com/2079-4991/10/12/2488 |
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