Effects of JFET Region Design and Gate Oxide Thickness on the Static and Dynamic Performance of 650 V SiC Planar Power MOSFETs

Effects of JFET Region Design and Gate Oxide Thickness on the Static and Dynamic Performance of 650 V SiC Planar Power MOSFETs

650 V SiC planar MOSFETs with various JFET widths, JFET doping concentrations, and gate oxide thicknesses were fabricated by a commercial SiC foundry on two six-inch SiC epitaxial wafers. An orthogonal <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="...

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Bibliographic Details
Main Authors: Shengnan Zhu, Tianshi Liu, Junchong Fan, Hema Lata Rao Maddi, Marvin H. White, Anant K. Agarwal
Format: Article
Language:English
Published: MDPI AG 2022-08-01
Series:Materials
Subjects:
SiC power MOSFET
JFET width
JFET doping concentration
gate oxide thickness
orthogonal P<sup>+</sup> layout
gate-drain capacitance
Online Access:https://www.mdpi.com/1996-1944/15/17/5995

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https://www.mdpi.com/1996-1944/15/17/5995

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