A Single-Amplifier Dual-Residue Pipelined-SAR ADC
This work presents a 12 bit 200 MS/s dual-residue pipelined successive approximation registers (SAR) analog-to-digital converter (ADC) with a single open-loop residue amplifier (RA). By using the inherent characteristics of the SAR conversion scheme, the proposed ADC sequentially generates two resid...
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Format: | Article |
Language: | English |
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MDPI AG
2021-02-01
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Series: | Electronics |
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Online Access: | https://www.mdpi.com/2079-9292/10/4/421 |