Dynamic Partial Reconfiguration of Concurrent Control Systems Specified by Petri Nets and Implemented in Xilinx FPGA Devices
This paper proposes a novel design concept of concurrent control systems specified by interpreted Petri nets and implemented in Xilinx FPGA devices. The technique is oriented on further dynamic partial reconfiguration of the system. An adequate splitting algorithm of the system into the dynamic (rec...
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| Format: | Article |
| Language: | English |
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IEEE
2018-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/8359408/ |