Design and optimisation of high‐efficient class‐F ULP‐PA using envelope tracking supply bias control for long‐range low power wireless local area network IEEE 802.11ah standard using 65 nm CMOS technology

Design and optimisation of high‐efficient class‐F ULP‐PA using envelope tracking supply bias control for long‐range low power wireless local area network IEEE 802.11ah standard using 65 nm CMOS technology

Abstract This article presents the design and optimisation of a sub‐1 GHz class‐F ultra‐low power (ULP) power amplifier (PA) in 65 nm Complementary Metal Oxide Semiconductor (CMOS) technology. An envelope tracking (ET) supply biasing technique is adopted to improve the efficiency of class‐F PA. The...

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Bibliographic Details
Main Authors: Muhammad Ovais Akhter, Najam Muhammad Amin, Razia Zia
Format: Article
Language:English
Published: Hindawi-IET 2022-10-01
Series:IET Circuits, Devices and Systems
Subjects:
CMOS integrated circuits
low‐power electronics
UHF integrated circuits
UHF power amplifiers
wireless LAN
Online Access:https://doi.org/10.1049/cds2.12125

Internet

https://doi.org/10.1049/cds2.12125

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