LOW POWER AND IMPROVED SPEED 1T DRAM USING DYNAMIC LOGIC
The new trend of the DRAM design is to characterize by its reliability, delay, low power dissipation, and area. This paper dealt with the design of 1-bit DRAM and efficient implementation of a sense amplifier. The proposed 1-bit DRAM designed using dynamic logic design. The proposed circuit consists...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Taylor's University
2018-06-01
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| Series: | Journal of Engineering Science and Technology |
| Subjects: | |
| Online Access: | http://jestec.taylors.edu.my/Vol%2013%20issue%206%20June%202018/13_6_18.pdf |