FPGA and digital SOIC SET’s control under heavy ion and proton irradiation
The paper presents discussion about SETs generated in FPGA and SOIC under heavy ions and high energy protons irradiation and SET suppression in electronics. Schematic circuit for FPGA/SOIC SET detection is presented. The schematic circuit is designed for SET investigation both inside FPGA/SOIC and o...
Main Authors: | , , , |
---|---|
Format: | Article |
Language: | English |
Published: |
Joint Stock Company "Experimental Scientific and Production Association SPELS
2016-10-01
|
Series: | Безопасность информационных технологий |
Subjects: | |
Online Access: | https://bit.mephi.ru/index.php/bit/article/view/22 |