Research on Circuit Level Protection Design of SRAM Single Event Latch-up Effect
SRAM with high density CMOS technology is extremely sensitive to single event latch�up, so it is necessary to adopt corresponding protection strategies in space applications. For CTOS with reduced radiation resistance, circuit level protection becomes an important part to improve system reliability...
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| Format: | Article |
| Language: | English |
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Editorial Board of Atomic Energy Science and Technology
2022-04-01
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| Series: | Yuanzineng kexue jishu |
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| Online Access: | https://www.aest.org.cn/CN/abstract/abstract21389.shtml |
| _version_ | 1811304735830966272 |
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| author | WU Hao;ZHU Xiang;HAN Jianwei;SHANGGUAN Shipeng;MA Yingqi;LI Yue;ZHAO Xu;YANG Han |
| author_facet | WU Hao;ZHU Xiang;HAN Jianwei;SHANGGUAN Shipeng;MA Yingqi;LI Yue;ZHAO Xu;YANG Han |
| author_sort | WU Hao;ZHU Xiang;HAN Jianwei;SHANGGUAN Shipeng;MA Yingqi;LI Yue;ZHAO Xu;YANG Han |
| collection | DOAJ |
| description | SRAM with high density CMOS technology is extremely sensitive to single event latch�up, so it is necessary to adopt corresponding protection strategies in space applications. For CTOS with reduced radiation resistance, circuit level protection becomes an important part to improve system reliability. A series of single event latch�up effect tests were carried out on CY62167DV30LL SRAM of CYPRESS Company by using laser single event effect test device. Through the linear fitting of the experimental results, the holding voltage of the SRAM is 1�5�1�6 V, and the holding current is 9�9�11�2 mA. According to the holding current, holding voltage, working current and working voltage, judge whether circuit level protection can be adopted. Two circuit level protection methods of power supply current limiting and divider resistor were proposed, and the value range of power supply current limiting and divider resistor were calculated quantitatively. In the previous literature, resistor is only used as a means of current limiting after latch�up trigger, which can not prevent the device from latch�up. It is found that the divider resistor can also achieve the purpose of preventing the latch�up under certain conditions. The two protection methods were verified by pulse laser test. |
| first_indexed | 2024-04-13T08:11:48Z |
| format | Article |
| id | doaj.art-a0dcf618bbb74194a6231ed2fa9f7d84 |
| institution | Directory Open Access Journal |
| issn | 1000-6931 |
| language | English |
| last_indexed | 2024-04-13T08:11:48Z |
| publishDate | 2022-04-01 |
| publisher | Editorial Board of Atomic Energy Science and Technology |
| record_format | Article |
| series | Yuanzineng kexue jishu |
| spelling | doaj.art-a0dcf618bbb74194a6231ed2fa9f7d842022-12-22T02:54:56ZengEditorial Board of Atomic Energy Science and TechnologyYuanzineng kexue jishu1000-69312022-04-01564758766Research on Circuit Level Protection Design of SRAM Single Event Latch-up EffectWU Hao;ZHU Xiang;HAN Jianwei;SHANGGUAN Shipeng;MA Yingqi;LI Yue;ZHAO Xu;YANG Han0National Space Science Center, Chinese Academy of Sciences, Beijing 100190, China;University of Chinese Academy of Sciences, Beijing 100049, China SRAM with high density CMOS technology is extremely sensitive to single event latch�up, so it is necessary to adopt corresponding protection strategies in space applications. For CTOS with reduced radiation resistance, circuit level protection becomes an important part to improve system reliability. A series of single event latch�up effect tests were carried out on CY62167DV30LL SRAM of CYPRESS Company by using laser single event effect test device. Through the linear fitting of the experimental results, the holding voltage of the SRAM is 1�5�1�6 V, and the holding current is 9�9�11�2 mA. According to the holding current, holding voltage, working current and working voltage, judge whether circuit level protection can be adopted. Two circuit level protection methods of power supply current limiting and divider resistor were proposed, and the value range of power supply current limiting and divider resistor were calculated quantitatively. In the previous literature, resistor is only used as a means of current limiting after latch�up trigger, which can not prevent the device from latch�up. It is found that the divider resistor can also achieve the purpose of preventing the latch�up under certain conditions. The two protection methods were verified by pulse laser test.https://www.aest.org.cn/CN/abstract/abstract21389.shtmlsingle event latch-upstatic random access memorypulse lasercircuit level protection |
| spellingShingle | WU Hao;ZHU Xiang;HAN Jianwei;SHANGGUAN Shipeng;MA Yingqi;LI Yue;ZHAO Xu;YANG Han Research on Circuit Level Protection Design of SRAM Single Event Latch-up Effect Yuanzineng kexue jishu single event latch-up static random access memory pulse laser circuit level protection |
| title | Research on Circuit Level Protection Design of SRAM Single Event Latch-up Effect |
| title_full | Research on Circuit Level Protection Design of SRAM Single Event Latch-up Effect |
| title_fullStr | Research on Circuit Level Protection Design of SRAM Single Event Latch-up Effect |
| title_full_unstemmed | Research on Circuit Level Protection Design of SRAM Single Event Latch-up Effect |
| title_short | Research on Circuit Level Protection Design of SRAM Single Event Latch-up Effect |
| title_sort | research on circuit level protection design of sram single event latch up effect |
| topic | single event latch-up static random access memory pulse laser circuit level protection |
| url | https://www.aest.org.cn/CN/abstract/abstract21389.shtml |
| work_keys_str_mv | AT wuhaozhuxianghanjianweishangguanshipengmayingqiliyuezhaoxuyanghan researchoncircuitlevelprotectiondesignofsramsingleeventlatchupeffect |