Research on Circuit Level Protection Design of SRAM Single Event Latch-up Effect

Research on Circuit Level Protection Design of SRAM Single Event Latch-up Effect

SRAM with high density CMOS technology is extremely sensitive to single event latch�up, so it is necessary to adopt corresponding protection strategies in space applications. For CTOS with reduced radiation resistance, circuit level protection becomes an important part to improve system reliability...

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Bibliographic Details
Main Author: WU Hao;ZHU Xiang;HAN Jianwei;SHANGGUAN Shipeng;MA Yingqi;LI Yue;ZHAO Xu;YANG Han
Format: Article
Language:English
Published: Editorial Board of Atomic Energy Science and Technology 2022-04-01
Series:Yuanzineng kexue jishu
Subjects:
single event latch-up
static random access memory
pulse laser
circuit level protection
Online Access:https://www.aest.org.cn/CN/abstract/abstract21389.shtml

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