A 16-Bit 1-MS/s Pseudo-Differential SAR ADC With Digital Calibration and DNL Enhancement Achieving 92 dB SNDR
This paper presents a 16-bit 1 MS/s pseudo-differential Successive-Approximation-Register Analog-to-Digital Converter (SAR ADC) achieving an ENOB of 15-bit. To accommodate the pseudo-differential input, a differential DAC utilizing both monotonic and traditional switching is designed. For both dynam...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2019-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/8812735/ |