An Adiabatic Architecture for Linear Signal Processing
Using adiabatic CMOS logic instead of the more traditional static CMOS logic can lower the power consumption of a hardware design. However, the characteristic differences between adiabatic and static logic, such as a four-phase clock, have a far reaching influence on the design itself. These in...
| Main Authors: | , |
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| Format: | Article |
| Language: | deu |
| Published: |
Copernicus Publications
2005-01-01
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| Series: | Advances in Radio Science |
| Online Access: | http://www.adv-radio-sci.net/3/325/2005/ars-3-325-2005.pdf |