Design Strategies of 40 nm Split-Gate NOR Flash Memory Device for Low-Power Compute-in-Memory Applications

Design Strategies of 40 nm Split-Gate NOR Flash Memory Device for Low-Power Compute-in-Memory Applications

The existing von Neumann architecture for artificial intelligence (AI) computations suffers from excessive power consumption and memory bottlenecks. As an alternative, compute-in-memory (CIM) technology has been emerging. Among various CIM device candidates, split-gate NOR flash offers advantages su...

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Bibliographic Details
Main Authors: Chan-Gi Yook, Jung Nam Kim, Yoon Kim, Wonbo Shim
Format: Article
Language:English
Published: MDPI AG 2023-09-01
Series:Micromachines
Subjects:
compute-in-memory (CIM)
NOR flash
split-gate NOR flash
device optimization
artificial intelligence
convolutional neural network
Online Access:https://www.mdpi.com/2072-666X/14/9/1753

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https://www.mdpi.com/2072-666X/14/9/1753

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