Fault-tolerant method for anti-SEU of embedded system based on dual-core processor

Fault-tolerant method for anti-SEU of embedded system based on dual-core processor

The development of space applications based on commercial system on chip (SOC) FPGA devices has become an important direction for the development of aerospace technology, but single event upsets (SEUs) in space is a difficult problem for commercial SOC FPGAs for space applications. This article pres...

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Bibliographic Details
Main Authors: Xiuhai Cui, Qi Gao, Ruichao Wang, Li Liu, Jun Liang, Yu Peng
Format: Article
Language:English
Published: Wiley 2019-10-01
Series:The Journal of Engineering
Subjects:
error detection
radiation hardening (electronics)
fault tolerant computing
field programmable gate arrays
embedded systems
microprocessor chips
system-on-chip
redundancy
fault-tolerant method
embedded system
dual-core processor
arm processors
dual-core arm
soc fpga
dual-core mutual-check
control flow
triple modular redundancy
two-level watchdog
two-level fault-tolerance mechanism
antiseu capability
antianti method
Online Access:https://digital-library.theiet.org/content/journals/10.1049/joe.2018.9099

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https://digital-library.theiet.org/content/journals/10.1049/joe.2018.9099

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