An enhanced approach towards improving the performance of embedding memory management units into Network-on-Chip
Network-on-Chip (NoC) initiates the design procedure of interconnection network into SoC - System-on-Chip. The current technique overcomes the drawbacks of traditional bus-based SoC, for instance, poor scalability, small-link bandwidth, and large delay. The network-on-Chip systems required minimum b...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2023-12-01
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| Series: | e-Prime: Advances in Electrical Engineering, Electronics and Energy |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2772671123002279 |