Logic‐in‐Memory Operation of Ternary NAND/NOR Universal Logic Gates using Double‐Gated Feedback Field‐Effect Transistors

Logic‐in‐Memory Operation of Ternary NAND/NOR Universal Logic Gates using Double‐Gated Feedback Field‐Effect Transistors

Abstract In this study, the logic‐in‐memory operations are demonstrated of ternary NAND and NOR logic gates consisting of double‐gated feedback field‐effect transistors. The component transistors reconfigure their operation modes into n‐ or p‐channel modes by adjusting the gate biases. The highly sy...

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Bibliographic Details
Main Authors: Jaemin Son, Yunwoo Shin, Kyoungah Cho, Sangsig Kim
Format: Article
Language:English
Published: Wiley-VCH 2023-04-01
Series:Advanced Electronic Materials
Subjects:
field‐effect transistor
logic‐in‐memory
multivalued logic
positive feedback loop
universal gate
Online Access:https://doi.org/10.1002/aelm.202201134

Internet

https://doi.org/10.1002/aelm.202201134

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