Design of IP Core of Signal Generator of Pseudo-random Sequence Based on Nios II
The paper put forward a design method of IP core of signal generator of pseudo-random sequence according to Avalon bus specification of Nios II embedded system, and introduced hardware and software designs of the IP core in details. The method uses collaborative design of software and hardware of cu...
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Format: | Article |
Language: | zho |
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Editorial Department of Industry and Mine Automation
2011-02-01
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Series: | Gong-kuang zidonghua |
Subjects: | |
Online Access: | http://www.gkzdh.cn/article/id/2449 |
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author | ZHENG Gong-ming SHEN Yuan-yua |
author_facet | ZHENG Gong-ming SHEN Yuan-yua |
author_sort | ZHENG Gong-ming |
collection | DOAJ |
description | The paper put forward a design method of IP core of signal generator of pseudo-random sequence according to Avalon bus specification of Nios II embedded system, and introduced hardware and software designs of the IP core in details. The method uses collaborative design of software and hardware of custom component to achieve IP core design of signal generator of pseudo-random sequence with adjusted code length and order. Its feasibility and correctness were proved in design of controlled vibrating signal generator. |
first_indexed | 2024-04-09T23:56:03Z |
format | Article |
id | doaj.art-b12cac4bab1b440e8323a7709eed839f |
institution | Directory Open Access Journal |
issn | 1671-251X |
language | zho |
last_indexed | 2024-04-09T23:56:03Z |
publishDate | 2011-02-01 |
publisher | Editorial Department of Industry and Mine Automation |
record_format | Article |
series | Gong-kuang zidonghua |
spelling | doaj.art-b12cac4bab1b440e8323a7709eed839f2023-03-17T02:41:49ZzhoEditorial Department of Industry and Mine AutomationGong-kuang zidonghua1671-251X2011-02-013725255Design of IP Core of Signal Generator of Pseudo-random Sequence Based on Nios IIZHENG Gong-mingSHEN Yuan-yuaThe paper put forward a design method of IP core of signal generator of pseudo-random sequence according to Avalon bus specification of Nios II embedded system, and introduced hardware and software designs of the IP core in details. The method uses collaborative design of software and hardware of custom component to achieve IP core design of signal generator of pseudo-random sequence with adjusted code length and order. Its feasibility and correctness were proved in design of controlled vibrating signal generator.http://www.gkzdh.cn/article/id/2449pseudo-random sequence, signal generator, nios ii, sopc builder, avalon bus, ip core |
spellingShingle | ZHENG Gong-ming SHEN Yuan-yua Design of IP Core of Signal Generator of Pseudo-random Sequence Based on Nios II Gong-kuang zidonghua pseudo-random sequence, signal generator, nios ii, sopc builder, avalon bus, ip core |
title | Design of IP Core of Signal Generator of Pseudo-random Sequence Based on Nios II |
title_full | Design of IP Core of Signal Generator of Pseudo-random Sequence Based on Nios II |
title_fullStr | Design of IP Core of Signal Generator of Pseudo-random Sequence Based on Nios II |
title_full_unstemmed | Design of IP Core of Signal Generator of Pseudo-random Sequence Based on Nios II |
title_short | Design of IP Core of Signal Generator of Pseudo-random Sequence Based on Nios II |
title_sort | design of ip core of signal generator of pseudo random sequence based on nios ii |
topic | pseudo-random sequence, signal generator, nios ii, sopc builder, avalon bus, ip core |
url | http://www.gkzdh.cn/article/id/2449 |
work_keys_str_mv | AT zhenggongming designofipcoreofsignalgeneratorofpseudorandomsequencebasedonniosii AT shenyuanyua designofipcoreofsignalgeneratorofpseudorandomsequencebasedonniosii |