FPGA Implementation of ECG Signal Processing for Use in a Neonatal Heart Rate Monitoring System

FPGA Implementation of ECG Signal Processing for Use in a Neonatal Heart Rate Monitoring System

A field-programmable gate array (FPGA) based system for digital filtering in a neonatal heart rate monitoring system is presented. The system employs electric potential sensors (EPS) and contains a single hardware filter stage for antialiasing. The remaining digital signal processing required to pro...

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Bibliographic Details
Main Authors: Henry Dore, Rodrigo Aviles-Espinosa, Elizabeth Rendon-Morales
Format: Article
Language:English
Published: MDPI AG 2022-11-01
Series:Engineering Proceedings
Subjects:
heart rate
FPGA
ECG
newborn
medical devices
DSP
Online Access:https://www.mdpi.com/2673-4591/27/1/70

Internet

https://www.mdpi.com/2673-4591/27/1/70

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