DESIGN OF A LOW DROP-OUT VOLTAGE REGULATOR USING 0.13 µm CMOS TECHNOLOGY

DESIGN OF A LOW DROP-OUT VOLTAGE REGULATOR USING 0.13 µm CMOS TECHNOLOGY

In this paper, the design of a 4.5 V low drop out voltage regulator is proposed. Two-stage cascaded operational transconductance amplifier has been used as error amplifier. The two-stage amplifier is designed with body bias technique to reduce the drop out voltage of LDO regulator. In addition, PMOS...

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Bibliographic Details
Main Authors: NORHAIDA BINTI MUSTAFA, FLORENCE CHOONG, MAMUN BIN IBNE REAZ, WAN IRMA IDAYU WAN MOHD NASIR, NOORFAZILA KAMAL, ABDUL MUKIT
Format: Article
Language:English
Published: Taylor's University 2018-05-01
Series:Journal of Engineering Science and Technology
Subjects:
Body driven technique
Low drop out
Pass transistor
Transconductance amplifier
Voltage regulator
Online Access:http://jestec.taylors.edu.my/Vol%2013%20issue%205%20May%202018/13_5_11.pdf

Internet

http://jestec.taylors.edu.my/Vol%2013%20issue%205%20May%202018/13_5_11.pdf

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