Suppression of Kink in the Output Characteristics of AlInN/GaN High Electron Mobility Transistors by Post-Gate Metallization Annealing
In this paper, we report the effect of post-gate metallization annealing on the performance of GaN-based High Electron Mobility Transistors (HEMTs). The performances of HEMTs annealed at 200 °C (HEMT1) and at 400 °C (HEMT2) for 5 minutes in N2 ambient are compared. While there...
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| Format: | Article |
| Language: | English |
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IEEE
2023-01-01
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| Series: | IEEE Journal of the Electron Devices Society |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9963604/ |
| _version_ | 1797902314045964288 |
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| author | Sujan Sarkar Ramdas P. Khade Ajay Shanbhag Nandita DasGupta Amitava DasGupta |
| author_facet | Sujan Sarkar Ramdas P. Khade Ajay Shanbhag Nandita DasGupta Amitava DasGupta |
| author_sort | Sujan Sarkar |
| collection | DOAJ |
| description | In this paper, we report the effect of post-gate metallization annealing on the performance of GaN-based High Electron Mobility Transistors (HEMTs). The performances of HEMTs annealed at 200 °C (HEMT1) and at 400 °C (HEMT2) for 5 minutes in N2 ambient are compared. While there is a kink in the output characteristics of HEMT1, there is no such kink in the output characteristics of HEMT2. The kink is attributed to impact ionization in the GaN channel. Surface and interface traps of HEMT1 increase the peak electric field at the drain side gate edge and cause impact ionization. The post-gate metallization annealing at a higher temperature reduces the surface and interface traps, which reduces the peak electric field in HEMT2 and suppresses impact ionization. This is substantiated by TCAD simulations. Threshold voltage instability on the application of negative gate bias stress was also examined for these devices. A positive shift in threshold voltage was observed in HEMT1 on the application of negative gate bias stress, whereas the corresponding shift was negative in HEMT2, indicating the presence of two different types of traps in HEMT1 and HEMT2. |
| first_indexed | 2024-04-10T09:15:47Z |
| format | Article |
| id | doaj.art-ba5d7f335eef4f758d3f19ef237336ce |
| institution | Directory Open Access Journal |
| issn | 2168-6734 |
| language | English |
| last_indexed | 2024-04-10T09:15:47Z |
| publishDate | 2023-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal of the Electron Devices Society |
| spelling | doaj.art-ba5d7f335eef4f758d3f19ef237336ce2023-02-21T00:00:36ZengIEEEIEEE Journal of the Electron Devices Society2168-67342023-01-0111788310.1109/JEDS.2022.32245009963604Suppression of Kink in the Output Characteristics of AlInN/GaN High Electron Mobility Transistors by Post-Gate Metallization AnnealingSujan Sarkar0https://orcid.org/0000-0001-7973-3933Ramdas P. Khade1https://orcid.org/0000-0003-0058-1362Ajay Shanbhag2https://orcid.org/0000-0002-2858-1666Nandita DasGupta3https://orcid.org/0000-0001-8495-9398Amitava DasGupta4Department of Electrical Engineering, Indian Institute of Technology Madras, Chennai, IndiaDepartment of Electrical Engineering, Indian Institute of Technology Madras, Chennai, IndiaDepartment of Electrical Engineering, Indian Institute of Technology Madras, Chennai, IndiaDepartment of Electrical Engineering, Indian Institute of Technology Madras, Chennai, IndiaDepartment of Electrical Engineering, Indian Institute of Technology Madras, Chennai, IndiaIn this paper, we report the effect of post-gate metallization annealing on the performance of GaN-based High Electron Mobility Transistors (HEMTs). The performances of HEMTs annealed at 200 °C (HEMT1) and at 400 °C (HEMT2) for 5 minutes in N2 ambient are compared. While there is a kink in the output characteristics of HEMT1, there is no such kink in the output characteristics of HEMT2. The kink is attributed to impact ionization in the GaN channel. Surface and interface traps of HEMT1 increase the peak electric field at the drain side gate edge and cause impact ionization. The post-gate metallization annealing at a higher temperature reduces the surface and interface traps, which reduces the peak electric field in HEMT2 and suppresses impact ionization. This is substantiated by TCAD simulations. Threshold voltage instability on the application of negative gate bias stress was also examined for these devices. A positive shift in threshold voltage was observed in HEMT1 on the application of negative gate bias stress, whereas the corresponding shift was negative in HEMT2, indicating the presence of two different types of traps in HEMT1 and HEMT2.https://ieeexplore.ieee.org/document/9963604/HEMTimpact ionizationfloating sourcenegative gate bias stresstraps |
| spellingShingle | Sujan Sarkar Ramdas P. Khade Ajay Shanbhag Nandita DasGupta Amitava DasGupta Suppression of Kink in the Output Characteristics of AlInN/GaN High Electron Mobility Transistors by Post-Gate Metallization Annealing IEEE Journal of the Electron Devices Society HEMT impact ionization floating source negative gate bias stress traps |
| title | Suppression of Kink in the Output Characteristics of AlInN/GaN High Electron Mobility Transistors by Post-Gate Metallization Annealing |
| title_full | Suppression of Kink in the Output Characteristics of AlInN/GaN High Electron Mobility Transistors by Post-Gate Metallization Annealing |
| title_fullStr | Suppression of Kink in the Output Characteristics of AlInN/GaN High Electron Mobility Transistors by Post-Gate Metallization Annealing |
| title_full_unstemmed | Suppression of Kink in the Output Characteristics of AlInN/GaN High Electron Mobility Transistors by Post-Gate Metallization Annealing |
| title_short | Suppression of Kink in the Output Characteristics of AlInN/GaN High Electron Mobility Transistors by Post-Gate Metallization Annealing |
| title_sort | suppression of kink in the output characteristics of alinn gan high electron mobility transistors by post gate metallization annealing |
| topic | HEMT impact ionization floating source negative gate bias stress traps |
| url | https://ieeexplore.ieee.org/document/9963604/ |
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