An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance
This work proposes a vertical gallium nitride (GaN) parallel split gate trench MOSFET (PSGT-MOSFET) device architecture suitable for power conversion applications. Wherein two parallel gates, and a field plate are introduced vertically on the sidewalls and connected, respectively, to the gate and so...
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| Format: | Article |
| Language: | English |
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IEEE
2023-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10097498/ |
| _version_ | 1797823443632128000 |
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| author | Nilesh Kumar Jaiswal V. N. Ramakrishnan |
| author_facet | Nilesh Kumar Jaiswal V. N. Ramakrishnan |
| author_sort | Nilesh Kumar Jaiswal |
| collection | DOAJ |
| description | This work proposes a vertical gallium nitride (GaN) parallel split gate trench MOSFET (PSGT-MOSFET) device architecture suitable for power conversion applications. Wherein two parallel gates, and a field plate are introduced vertically on the sidewalls and connected, respectively, to the gate and source. Technology computer-aided design (TCAD) simulator was used in the design process to achieve a specific on-resistance as low as 0.79 <inline-formula> <tex-math notation="LaTeX">$\text{m}\Omega $ </tex-math></inline-formula>.cm2 for the device, which has the capacity of blocking voltages up to 600 V. The peak electric field of the PSGT-MOSFET could well be lowered to 2.95 MV/cm, which is about 17% lower than that of a conventional trench gate MOSFET (TG-MOSFET) near the trench corner with help of suitable design and optimization of trench depth, drift doping, and field plate thickness. The TCAD simulation shows that the higher drift doping on the device performance of PSGT-MOSFET produces <inline-formula> <tex-math notation="LaTeX">$\sim 2\times $ </tex-math></inline-formula> lower switching losses when compared with a similarly rated conventional TG-MOSFET device. |
| first_indexed | 2024-03-13T10:24:06Z |
| format | Article |
| id | doaj.art-bb3d686cf5c448c0b02be3dfbf3a1f88 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-03-13T10:24:06Z |
| publishDate | 2023-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-bb3d686cf5c448c0b02be3dfbf3a1f882023-05-19T23:00:48ZengIEEEIEEE Access2169-35362023-01-0111469984700610.1109/ACCESS.2023.326547710097498An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching PerformanceNilesh Kumar Jaiswal0https://orcid.org/0000-0002-4394-594XV. N. Ramakrishnan1https://orcid.org/0000-0002-7746-7982Department of Micro and Nanoelectronics, Vellore Institute of Technology, Vellore, Tamil Nadu, IndiaDepartment of Micro and Nanoelectronics, Vellore Institute of Technology, Vellore, Tamil Nadu, IndiaThis work proposes a vertical gallium nitride (GaN) parallel split gate trench MOSFET (PSGT-MOSFET) device architecture suitable for power conversion applications. Wherein two parallel gates, and a field plate are introduced vertically on the sidewalls and connected, respectively, to the gate and source. Technology computer-aided design (TCAD) simulator was used in the design process to achieve a specific on-resistance as low as 0.79 <inline-formula> <tex-math notation="LaTeX">$\text{m}\Omega $ </tex-math></inline-formula>.cm2 for the device, which has the capacity of blocking voltages up to 600 V. The peak electric field of the PSGT-MOSFET could well be lowered to 2.95 MV/cm, which is about 17% lower than that of a conventional trench gate MOSFET (TG-MOSFET) near the trench corner with help of suitable design and optimization of trench depth, drift doping, and field plate thickness. The TCAD simulation shows that the higher drift doping on the device performance of PSGT-MOSFET produces <inline-formula> <tex-math notation="LaTeX">$\sim 2\times $ </tex-math></inline-formula> lower switching losses when compared with a similarly rated conventional TG-MOSFET device.https://ieeexplore.ieee.org/document/10097498/Vertical GaNtrench MOSFETsplit gateon-resistanceswitching lossTCAD |
| spellingShingle | Nilesh Kumar Jaiswal V. N. Ramakrishnan An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance IEEE Access Vertical GaN trench MOSFET split gate on-resistance switching loss TCAD |
| title | An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance |
| title_full | An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance |
| title_fullStr | An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance |
| title_full_unstemmed | An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance |
| title_short | An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance |
| title_sort | optimized vertical gan parallel split gate trench mosfet device structure for improved switching performance |
| topic | Vertical GaN trench MOSFET split gate on-resistance switching loss TCAD |
| url | https://ieeexplore.ieee.org/document/10097498/ |
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