Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs

The effects of low net-doped region on the electrical performance of tunnel field-effect transistors (TFETs) are investigated using a TCAD simulation. Compared with previous studies, it is observed that the low net-doped region between the source and pocket can enhance TFET electrical characteristic...

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Bibliographic Details
Main Authors: Ki Ryung Nam, Kwang Soo Kim, Woo Young Choi
Format: Article
Language:English
Published: IEEE 2023-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10082935/
Description
Summary:The effects of low net-doped region on the electrical performance of tunnel field-effect transistors (TFETs) are investigated using a TCAD simulation. Compared with previous studies, it is observed that the low net-doped region between the source and pocket can enhance TFET electrical characteristics such as the on-current (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {on}}$ </tex-math></inline-formula>) and subthreshold swing (SS) with fine on-off current ratio (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {on}}/I_{\mathrm {off}})$ </tex-math></inline-formula>. By optimizing the length of the low net-doped region, <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {on}}$ </tex-math></inline-formula> increased 14.6 times and SS is reduced by 34.6 &#x0025; compared with the TFET where the low net-doped region was not considered. Furthermore, guidelines for designing counter-doped pocket are proposed considering the low net-doped region. The local minimum in the conduction band can be used to further improve the on-current and SS performance by adjusting the pocket width and doping concentration. To avoid pocket-induced SS degradation, the pocket doping concentration must also considered when determining the optimal value of the pocket width and vice versa.
ISSN:2169-3536