Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs
The effects of low net-doped region on the electrical performance of tunnel field-effect transistors (TFETs) are investigated using a TCAD simulation. Compared with previous studies, it is observed that the low net-doped region between the source and pocket can enhance TFET electrical characteristic...
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| Format: | Article |
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IEEE
2023-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10082935/ |
| _version_ | 1797855357727408128 |
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| author | Ki Ryung Nam Kwang Soo Kim Woo Young Choi |
| author_facet | Ki Ryung Nam Kwang Soo Kim Woo Young Choi |
| author_sort | Ki Ryung Nam |
| collection | DOAJ |
| description | The effects of low net-doped region on the electrical performance of tunnel field-effect transistors (TFETs) are investigated using a TCAD simulation. Compared with previous studies, it is observed that the low net-doped region between the source and pocket can enhance TFET electrical characteristics such as the on-current (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {on}}$ </tex-math></inline-formula>) and subthreshold swing (SS) with fine on-off current ratio (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {on}}/I_{\mathrm {off}})$ </tex-math></inline-formula>. By optimizing the length of the low net-doped region, <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {on}}$ </tex-math></inline-formula> increased 14.6 times and SS is reduced by 34.6 % compared with the TFET where the low net-doped region was not considered. Furthermore, guidelines for designing counter-doped pocket are proposed considering the low net-doped region. The local minimum in the conduction band can be used to further improve the on-current and SS performance by adjusting the pocket width and doping concentration. To avoid pocket-induced SS degradation, the pocket doping concentration must also considered when determining the optimal value of the pocket width and vice versa. |
| first_indexed | 2024-04-09T20:22:26Z |
| format | Article |
| id | doaj.art-bb890980a718458bab3b7dfbad0169d3 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-04-09T20:22:26Z |
| publishDate | 2023-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-bb890980a718458bab3b7dfbad0169d32023-03-30T23:01:42ZengIEEEIEEE Access2169-35362023-01-0111305463055410.1109/ACCESS.2023.326228510082935Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETsKi Ryung Nam0Kwang Soo Kim1https://orcid.org/0000-0001-8243-3472Woo Young Choi2https://orcid.org/0000-0002-5515-2912Department of Electronic Engineering, Sogang University, Seoul, South KoreaInter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, South KoreaDepartment of Electrical and Computer Engineering, Seoul National University, Seoul, South KoreaThe effects of low net-doped region on the electrical performance of tunnel field-effect transistors (TFETs) are investigated using a TCAD simulation. Compared with previous studies, it is observed that the low net-doped region between the source and pocket can enhance TFET electrical characteristics such as the on-current (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {on}}$ </tex-math></inline-formula>) and subthreshold swing (SS) with fine on-off current ratio (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {on}}/I_{\mathrm {off}})$ </tex-math></inline-formula>. By optimizing the length of the low net-doped region, <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {on}}$ </tex-math></inline-formula> increased 14.6 times and SS is reduced by 34.6 % compared with the TFET where the low net-doped region was not considered. Furthermore, guidelines for designing counter-doped pocket are proposed considering the low net-doped region. The local minimum in the conduction band can be used to further improve the on-current and SS performance by adjusting the pocket width and doping concentration. To avoid pocket-induced SS degradation, the pocket doping concentration must also considered when determining the optimal value of the pocket width and vice versa.https://ieeexplore.ieee.org/document/10082935/Tunnel field-effect transistor (TFET)counter-doped pocketlow net-doped regionpocket widthtunneling width |
| spellingShingle | Ki Ryung Nam Kwang Soo Kim Woo Young Choi Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs IEEE Access Tunnel field-effect transistor (TFET) counter-doped pocket low net-doped region pocket width tunneling width |
| title | Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs |
| title_full | Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs |
| title_fullStr | Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs |
| title_full_unstemmed | Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs |
| title_short | Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs |
| title_sort | electrical characterization by counter doped pocket design in tunnel fets |
| topic | Tunnel field-effect transistor (TFET) counter-doped pocket low net-doped region pocket width tunneling width |
| url | https://ieeexplore.ieee.org/document/10082935/ |
| work_keys_str_mv | AT kiryungnam electricalcharacterizationbycounterdopedpocketdesignintunnelfets AT kwangsookim electricalcharacterizationbycounterdopedpocketdesignintunnelfets AT wooyoungchoi electricalcharacterizationbycounterdopedpocketdesignintunnelfets |