A low latency and low power indirect topology for on-chip communication.
This paper presents the Hybrid Scalable-Minimized-Butterfly-Fat-Tree (H-SMBFT) topology for on-chip communication. Main aspects of this work are the description of the architectural design and the characteristics as well as a comparative analysis against two established indirect topologies namely Bu...
| Main Authors: | , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Public Library of Science (PLoS)
2019-01-01
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| Series: | PLoS ONE |
| Online Access: | https://doi.org/10.1371/journal.pone.0222759 |