Area Efficient Computing-in-Memory Architecture Using STT/SOT Hybrid Three Level Cell
Spintronic-based computing-in-memory (CiM) architecture has emerged as one of the efficient solutions to counter the latency/bandwidth bottleneck of conventional von-Neumann architecture. However, computation within a small area while achieving low power consumption still remains a challe...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2022-01-01
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| Series: | IEEE Open Journal of Nanotechnology |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9756330/ |