High-Level Synthesis Design for Stencil Computations on FPGA with High Bandwidth Memory
Due to performance and energy requirements, FPGA-based accelerators have become a promising solution for high-performance computations. Meanwhile, with the help of high-level synthesis (HLS) compilers, FPGA can be programmed using common programming languages such as C, C++, or OpenCL, thereby impro...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2020-08-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/9/8/1275 |