Two-Dimensional Protection Code for Virtual Page Information in Translation Lookaside Buffers
Severe conditions such as high-energy particle strikes may induce soft errors in on-chip memory, like cache and translation lookaside buffers (TLBs). As the key component of virtual-to-physical address translation, TLB directly affects processor performance. To protect the virtual page information s...
Main Authors: | , , , , |
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Format: | Article |
Language: | English |
Published: |
MDPI AG
2024-04-01
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Series: | Electronics |
Subjects: | |
Online Access: | https://www.mdpi.com/2079-9292/13/7/1320 |