High-Performance Double-Node-Upset-Tolerant and Triple-Node-Upset-Tolerant Latch Designs

High-Performance Double-Node-Upset-Tolerant and Triple-Node-Upset-Tolerant Latch Designs

To avoid soft errors in integrated circuits, this paper presents two high-performance latch designs, namely LOCDNUTRL and LOCTNUTRL, protecting against double-node upset (DNU) and triple-node upset (TNU) in the harsh radiation environment. First, the LOCDNUTRL latch consists of two single-node upset...

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Bibliographic Details
Main Authors: Hui Xu, Le Zhou, Huaguo Liang, Zhengfeng Huang, Cong Sun, Yafei Ning
Format: Article
Language:English
Published: MDPI AG 2021-10-01
Series:Electronics
Subjects:
soft errors
triple-node upsets
self-recoverable
c-element
clock gating
fast path
Online Access:https://www.mdpi.com/2079-9292/10/20/2515

Internet

https://www.mdpi.com/2079-9292/10/20/2515

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