Retention-Aware DRAM Auto-Refresh Scheme for Energy and Performance Efficiency

Dynamic random access memory (DRAM) circuits require periodic refresh operations to prevent data loss. As DRAM density increases, DRAM refresh overhead is even worse due to the increase of the refresh cycle time. However, because of few the cells in memory that have lower retention time, DRAM has to...

Full description

Bibliographic Details
Main Authors: Wei-Kai Cheng, Po-Yuan Shen, Xin-Lun Li
Format: Article
Language:English
Published: MDPI AG 2019-09-01
Series:Micromachines
Subjects:
Online Access:https://www.mdpi.com/2072-666X/10/9/590