A Robust Ultra-Low Voltage CPU Utilizing Timing-Error Prevention
To minimize energy consumption of a digital circuit, logic can be operated at sub- or near-threshold voltage. Operation at this region is challenging due to device and environment variations, and resulting performance may not be adequate to all applications. This article presents two variants of a 3...
| Main Authors: | , , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2015-04-01
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| Series: | Journal of Low Power Electronics and Applications |
| Subjects: | |
| Online Access: | http://www.mdpi.com/2079-9268/5/2/57 |