| Summary: | For the formation of nano-scale Ge channels in vertical Gate-all-around field-effect transistors (vGAAFETs), the selective isotropic etching of Ge selective to Ge<sub>0.8</sub>Si<sub>0.2</sub> was considered. In this work, a dual-selective atomic layer etching (ALE), including Ge<sub>0.8</sub>Si<sub>0.2</sub>-selective etching of Ge and crystal-orientation selectivity of Ge oxidation, has been developed to control the etch rate and the size of the Ge nanowires. The ALE of Ge in p<sup>+</sup>-Ge<sub>0.8</sub>Si<sub>0.2</sub>/Ge stacks with 70% HNO<sub>3</sub> as oxidizer and deionized (DI) water as oxide-removal was investigated in detail. The saturated relative etched amount per cycle (REPC) and selectivity at different HNO<sub>3</sub> temperatures between Ge and p<sup>+</sup>-Ge<sub>0.8</sub>Si<sub>0.2</sub> were obtained. In p<sup>+</sup>-Ge<sub>0.8</sub>Si<sub>0.2</sub>/Ge stacks with (110) sidewalls, the REPC of Ge was 3.1 nm and the saturated etching selectivity was 6.5 at HNO<sub>3</sub> temperature of 20 °C. The etch rate and the selectivity were affected by HNO<sub>3</sub> temperatures. As the HNO<sub>3</sub> temperature decreased to 10 °C, the REPC of Ge was decreased to 2 nm and the selectivity remained at about 7.4. Finally, the application of ALE in the formation of Ge nanowires in vGAAFETs was demonstrated where the preliminary I<sub>d</sub>–V<sub>ds</sub> output characteristic curves of Ge vGAAFET were provided.
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