Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis
Abstract Carbon nanotubes (CNTs) can be locally grown on custom-designed CMOS microheaters by a thermal chemical vapour deposition (CVD) process to utilize the sensing capabilities of CNTs in emerging micro- and nanotechnology applications. For such a direct CMOS-CNT integration, a key requirement i...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
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Nature Publishing Group
2023-11-01
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| Series: | Microsystems & Nanoengineering |
| Online Access: | https://doi.org/10.1038/s41378-023-00598-w |
| _version_ | 1797630190381170688 |
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| author | Avisek Roy Bao Q. Ta Mehdi Azadmehr Knut E. Aasmundtveit |
| author_facet | Avisek Roy Bao Q. Ta Mehdi Azadmehr Knut E. Aasmundtveit |
| author_sort | Avisek Roy |
| collection | DOAJ |
| description | Abstract Carbon nanotubes (CNTs) can be locally grown on custom-designed CMOS microheaters by a thermal chemical vapour deposition (CVD) process to utilize the sensing capabilities of CNTs in emerging micro- and nanotechnology applications. For such a direct CMOS-CNT integration, a key requirement is the development of necessary post-processing steps on CMOS chips for fabricating CMOS-MEMS polysilicon heaters that can locally generate the required CNT synthesis temperatures (~650–900 °C). In our post-CMOS processing, a subtractive fabrication technique is used for micromachining the polysilicon heaters, where the passivation layers in CMOS are used as masks to protect the electronics. For dielectric etching, it is necessary to achieve high selectivity, uniform etching and a good etch rate to fully expose the polysilicon layers without causing damage. We achieved successful post-CMOS processing by developing two-step reactive ion etching (RIE) of the SiO2 dielectric layer and making design improvements to a second-generation CMOS chip. After the dry etching process, CMOS-MEMS microheaters are partially suspended by SiO2 wet etching with minimum damage to the exposed aluminium layers, to obtain high thermal isolation. The fabricated microheaters are then successfully utilized for synthesizing CNTs by a local thermal CVD process. The CMOS post-processing challenges and design aspects to fabricate CMOS-MEMS polysilicon microheaters for such high-temperature applications are detailed in this article. Our developed process for heterogeneous monolithic integration of CMOS-CNT shows promise for wafer-level manufacturing of CNT-based sensors by incorporating additional steps in an already existing foundry CMOS process. |
| first_indexed | 2024-03-11T11:03:38Z |
| format | Article |
| id | doaj.art-c3f694fd743241d3a31044e7db2b9bd3 |
| institution | Directory Open Access Journal |
| issn | 2055-7434 |
| language | English |
| last_indexed | 2024-03-11T11:03:38Z |
| publishDate | 2023-11-01 |
| publisher | Nature Publishing Group |
| record_format | Article |
| series | Microsystems & Nanoengineering |
| spelling | doaj.art-c3f694fd743241d3a31044e7db2b9bd32023-11-12T12:20:39ZengNature Publishing GroupMicrosystems & Nanoengineering2055-74342023-11-019111510.1038/s41378-023-00598-wPost-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesisAvisek Roy0Bao Q. Ta1Mehdi Azadmehr2Knut E. Aasmundtveit3Department of Microsystems, University of South-Eastern NorwayDepartment of Microsystems, University of South-Eastern NorwayDepartment of Microsystems, University of South-Eastern NorwayDepartment of Microsystems, University of South-Eastern NorwayAbstract Carbon nanotubes (CNTs) can be locally grown on custom-designed CMOS microheaters by a thermal chemical vapour deposition (CVD) process to utilize the sensing capabilities of CNTs in emerging micro- and nanotechnology applications. For such a direct CMOS-CNT integration, a key requirement is the development of necessary post-processing steps on CMOS chips for fabricating CMOS-MEMS polysilicon heaters that can locally generate the required CNT synthesis temperatures (~650–900 °C). In our post-CMOS processing, a subtractive fabrication technique is used for micromachining the polysilicon heaters, where the passivation layers in CMOS are used as masks to protect the electronics. For dielectric etching, it is necessary to achieve high selectivity, uniform etching and a good etch rate to fully expose the polysilicon layers without causing damage. We achieved successful post-CMOS processing by developing two-step reactive ion etching (RIE) of the SiO2 dielectric layer and making design improvements to a second-generation CMOS chip. After the dry etching process, CMOS-MEMS microheaters are partially suspended by SiO2 wet etching with minimum damage to the exposed aluminium layers, to obtain high thermal isolation. The fabricated microheaters are then successfully utilized for synthesizing CNTs by a local thermal CVD process. The CMOS post-processing challenges and design aspects to fabricate CMOS-MEMS polysilicon microheaters for such high-temperature applications are detailed in this article. Our developed process for heterogeneous monolithic integration of CMOS-CNT shows promise for wafer-level manufacturing of CNT-based sensors by incorporating additional steps in an already existing foundry CMOS process.https://doi.org/10.1038/s41378-023-00598-w |
| spellingShingle | Avisek Roy Bao Q. Ta Mehdi Azadmehr Knut E. Aasmundtveit Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis Microsystems & Nanoengineering |
| title | Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis |
| title_full | Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis |
| title_fullStr | Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis |
| title_full_unstemmed | Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis |
| title_short | Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis |
| title_sort | post cmos processing challenges and design developments of cmos mems microheaters for local cnt synthesis |
| url | https://doi.org/10.1038/s41378-023-00598-w |
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