The Demonstration of S<sup>2</sup>P (Serial-to-Parallel) Converter with Address Allocation Method Using 28 nm CMOS Technology
To improve the performance of analog, RF, and digital integrated circuits, the cutting-edge advanced CMOS technology has been widely utilized. We successfully designed and implemented a high-speed and low-power serial-to-parallel (S<sup>2</sup>P) converter for 5G applications based on th...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2021-01-01
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| Series: | Applied Sciences |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2076-3417/11/1/429 |