Tunnel FET Analog Benchmarking and Circuit Design

Tunnel FET Analog Benchmarking and Circuit Design

A platform for benchmarking tunnel field-effect transistors (TFETs) for analog applications is presented and used to compare selected TFETs to FinFET technology at the 14-nm node. This benchmarking is enabled by the development of a universal TFET SPICE model and a parameter extraction procedure bas...

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Bibliographic Details
Main Authors: Hao Lu, Paolo Paletti, Wenjun Li, Patrick Fay, Trond Ytterdal, Alan Seabaugh
Format: Article
Language:English
Published: IEEE 2018-01-01
Series:IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Subjects:
Analog circuit
benchmarking
compact model
steep subthreshold swing (SS)
tunnel field-effect transistor (TFET)
ultralow-voltage circuit
Online Access:https://ieeexplore.ieee.org/document/8320286/

Internet

https://ieeexplore.ieee.org/document/8320286/

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