Optimization of linear cell 4H-SiC power JBSFETs: Impact of N+ source contact resistance

SiC JBSFETs are fabricated using low contact anneal temperature to simultaneously form the ohmic contact to the N+ source region and a Schottky contact at the JBS diode. It is demonstrated in this paper that a larger N+ source contact width can substantially improve the on-resistance and figures-of-...

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Bibliographic Details
Main Authors: Aditi Agarwal, B. Jayant Baliga
Format: Article
Language:English
Published: Elsevier 2022-06-01
Series:Power Electronic Devices and Components
Subjects:
Online Access:http://www.sciencedirect.com/science/article/pii/S2772370422000050