A 7L and 11L High Step-Up SCMLI Topology With Reduced Component Voltage Stress

This article proposes a new capacitor-based multilevel inverter topology (CBMLI) with fewer devices and reduced voltage stress on capacitors and switches. In addition, the proposed topology can be configured as either a 7-level (7L) or 11L circuit with a maximum voltage gain of 3 and 2.5 times, resp...

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Bibliographic Details
Main Authors: Jagabar Sathik Mohamed Ali, Amjad Rehman Khan, Gopinath Narayanan Pandurangan, Prem Ponnusamy, Faten S. Alamri, Saeed Ali Bahaj
Format: Article
Language:English
Published: IEEE 2023-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10319417/