A 100 MHz 0.41 fJ/(Bit∙Search) 28 nm CMOS-Bulk Content Addressable Memory for HEP Experiments
This paper presents a transistor-level design with extensive experimental validation of a Content Addressable Memory (CAM), based on an eXclusive OR (XOR) single-bit cell. This design exploits a dedicated architecture and a fully custom approach (both in the schematic and the layout phase), in order...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2020-10-01
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| Series: | Journal of Low Power Electronics and Applications |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2079-9268/10/4/35 |