بناء نموذج تحليلي للتأخير في الشبكة المضمّنة على الشريحة باستخدام نظرية الترتيل
The Network-on-Chip architectures suffer from the difficulty of allocating processing resources in the execution time to suit the complex applications implemented on these architectures. In the event of any change in the input traffic, there is no change in the architecture level and its configurat...
| Main Authors: | , , |
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| Format: | Article |
| Language: | Arabic |
| Published: |
Tishreen University
2019-06-01
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| Series: | مجلة جامعة تشرين للبحوث والدراسات العلمية- سلسلة العلوم الهندسية |
| Online Access: | https://journal.tishreen.edu.sy/index.php/engscnc/article/view/8772 |