Guidelines for Area Ratio between Metal Lines and Vias to Improve the Reliability of Interconnect Systems in High-Density Electronic Devices
This research was conducted in the context of the semiconductor market, with a demand for high-performance and highly integrated semiconductor systems that simultaneously enhance performance and reduce chip size. Scaling down the metal line and via in back-end-of-line (BEOL) structures is essential...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2023-10-01
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| Series: | Electronics |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2079-9292/12/21/4403 |