10-Bit 5 MS/s Successive Approximation Register Analog-to-Digital Converter with a Phase-Locked Loop and Modified Bootstrapped Switch for a BLDC Motor Drive

10-Bit 5 MS/s Successive Approximation Register Analog-to-Digital Converter with a Phase-Locked Loop and Modified Bootstrapped Switch for a BLDC Motor Drive

In this paper, we present a successive approximation register (SAR) analog-to-digital converter (ADC) with a charge-pump (CP) phase-locked loop (PLL) and a bootstrapped switch, also called PLL-SAR ADC. To meet system-on-chip (SOC) and industrial requirements, the proposed SAR ADC and the control cir...

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Bibliographic Details
Main Authors: Guo-Ming Sung, Chong-Cheng Huang, Xiong Xiao, Shih-Ying Hsu
Format: Article
Language:English
Published: MDPI AG 2022-02-01
Series:Electronics
Subjects:
analog-to-digital converter (ADC)
brushless direct current (BLDC) motor
bootstrapped switch
charge pump (CP)
digital-to-analog converter (DAC)
dynamic comparator
Online Access:https://www.mdpi.com/2079-9292/11/4/624

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https://www.mdpi.com/2079-9292/11/4/624

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