A Calibration-Free Digital-to-Time Converter for Phase Interpolation-Based Fractional-N PLLs
In this paper, a fractional frequency division phase-locked loop based on phase interpolation is proposed and implemented using the TSMC 0.11 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sa...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2023-02-01
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| Series: | Electronics |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2079-9292/12/4/841 |